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A single level cache has following specifications.Access time = 2.5 nsLine size = 64 bytesHit ratio = 0.95Main memory uses a block transfer capability, and has first word (4 bytes) access time of 50 ns and access time for following words as 5 ns.Compute the access time when there is a cache miss? Assume that the cache waits until the line has been fetched from main memory and then re-executes for a hit.Will increasing the line size to 128 bytes, and a resulting increase in H (hit ratio) to .97, reduce the average memory access time?